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" data-markdown-preview-path="/ohwr/project/ertm15-llrf-wr/-/preview_markdown" data-new-url="/ohwr/project/ertm15-llrf-wr/-/wikis/new" data-noteable-type="Wiki" data-notes-filters="{"Show all activity":0,"Show comments only":1,"Show history only":2}" data-page-author-email="vasco@guita.org" data-page-heading="Home" data-page-info="{"last_commit_sha":"419d8caf19c197cd44a47a0e54dcfc247e734517","persisted":true,"title":"Home","content":"# eRTM14/15 - High Performance White Rabbit Timing Receiver in MTCA.4 format\n\n## Project description\n\nThe HP WR Timing Receiver is composed by two MTCA eRTM (Rear Transition Module) modules: \n- Digital board (WR node), sitting in the slot 14. The board provides a redundant uplink to the WR network (2 SFP ports) and hosts the FPGA that implements the WR stack.\n- RF board, using the slot 15. This board produces the Local Oscillator/Reference RF signals using a DDS as well as two configurable digital LVPECL clocks. They are distributed to the RTM/AMC slots of a MTCA.4 crate through the [MTCA.4 RF Backplane](https://www.nateurope.com/products/formfactors/MicroTCA.4//NAT-LLRF-Backplane)\nThe two boards always go together (stacked in a \"sandwich\" form) into the neighboring backplane slots 14 and 15. Inter-board communication is done through a high speed board-to-board cable.\n\n\n[] \n**Image of the eRTM14/15 board set**\n\n[](https://gitlab.com/ohwr/project/ertm15-llrf-wr/-/wikis/uploads/d88429836fda644e836e7e5c3a353abd/wr-llrf-scheme.png) \n**Block diagram**\n\n-----\n\n## Features\n\n### Digital Board\n - Kintex-7 (XC7K70) FPGA\n - White Rabbit Core with redundant WR links\n - Fully deterministic gigabit transceiver (GTX) with no-phase-jump mode\n - Controls the RF board through the board-to-board connector\n - Front panel:\n - 2 SFP cages for White Rabbit input\n - PPS input and output connectors (SMA)\n - 10 MHz input (SMA)\n - WR clock output (SMA)\n - USB serial console\n\n### RF Board\n - Front panel outputs:\n - RTM clocks CLKA and CLKB (SMA)\n - 2 LO Monitor (SMA)\n - 2 REF Monitor (SMA)\n - Zone-3 backplane connector:\n - 11 RTM\\_CLKA signals (configurable: 62.5 MHz, 100 MHz, 125 MHz, 200 MHz, 250\n MHz, 500 MHz)\n - 11 RTM\\_CLKB signals (configurable: 62.5 MHz, 100 MHz, 125 MHz, 200 MHz, 250\n MHz, 500 MHz)\n - LVPECL clock signals with double termination, unused clocks can\n be shut down.\n - Possibility to encode PPS and time-code information into CLKA\n and CLKB\n - Less than 100 fs RMS jitter (100 Hz - 20 MHz)\n - LO/REF/CAL backplane connector (Radiall Coaxipack)\n - 9 LO signals, 10-250 MHz, 12 dBm\n - 9 REF signals, 10-250 MHz, 12 dBm\n - Less than 100 fs RMS jitter (100 Hz - 5 MHz)\n - RF power monitoring on all backplane RF outputs\n - Unused RF channels can be internally terminated\n - Temperature sensors on LO and REF distribution sections\n - Unique IDs\n - Three EUI-48 (MAC addresses) on WR Main Board (two for Ethernet\n links, one for storage)\n - One EUI-48 ID for RF board (storage)\n - STM32F microcontroller for MicroTCA management\n - Runs OpenMMC\n \n-----\n\n## Documentation\n\n### Digital Board - eRTM14\n- EDMS schematics \u0026 layout: [EDA-03849-V1-0](https://edms.cern.ch/ui/#!master/navigator/item?P:100145998:100145999:subDocs) - [Review notes](/eRTM14-Schematics-\u0026-Layout-Review)\n- EDMS schematics \u0026 layout: [EDA-03849-V2-0](https://edms.cern.ch/item/EDA-03849-V2-0/0)\n\n### RF Board - eRTM15\n- EDMS schematics \u0026 layout: [EDA-03850-V1-0](https://edms.cern.ch/ui/#!master/navigator/item?P:100146008:100146009:subDocs) - [Review notes](/eRTM15-Schematics-\u0026-Layout-Review)\n- EDMS schematics \u0026 layout: [EDA-03850-V2-0](https://edms.cern.ch/item/EDA-03850-V2-0/0), [EDA-03850-V2-1](https://edms.cern.ch/item/EDA-03850-V2-1/0)\n\n## Read more\n\n - [MTCA 4.1 for LLRF distribution using WR](https://gitlab.com/ohwr/project/ertm15-llrf-wr/-/wikis/uploads/3542cbca2ee859250d168d9e14b7731b/llrf_section_review_public.pdf): presentation describing the main design concepts\n - [New WR Developments for Low Level Radio Frequency Systems](https://gitlab.com/ohwr/project/white-rabbit/-/wikis/uploads/3f006ea31593d3ca6854cbe1d7eae9d7/wr_workshop_oct2021.pdf), [11th WR Workshop 2021](https://gitlab.com/ohwr/project/white-rabbit/wikis/Oct2021Meeting)\n - [Synchronization through RF backplane](/synchronization)\n - [MTCA.4 RF Backplane](http://www.nateurope.com/products/NAT-LLRF-Backplane.html)\n - *Note: the backplane is not an open design and needs licensing\n from DESY. Patent application is filed: EP142004371.* \n - [MTCA 4 standard](https://cdsweb.cern.ch/record/1159873?ln=en)\n - [MTCA 4.1 standard (extension...