SemiAnalysis teardown reveals SMIC's N+3 process matches TSMC's N6 density. | KuCoin

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SemiAnalysis teardown reveals SMIC's N+3 process matches TSMC's N6 density.

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Release Time: 06/15/2026 06:53:27

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SemiAnalysis’s teardown shows that SMIC’s N+3 process matches TSMC’s N6 density, with a Bohr figure of 113.4 MTr/mm². The process employs SAQP, making it more complex than TSMC’s SADP. Huawei is testing 3D stacking and LogicFolding to achieve core speeds of up to 5GHz by 2031. Altcoins to watch may respond to such technological advancements. The Fear and Greed Index remains a key indicator of market sentiment amid hardware progress.

Article by: Tide Research<br>For decades, TechInsights has dominated the field of semiconductor reverse engineering. Last weekend, Dylan Patel’s SemiAnalysis officially released its first public teardown report from the STEEL Lab (Teardown Engineering & Evaluation Lab), targeting one of the world’s most closely watched chips: Huawei’s Kirin 9030 Pro, built on SMIC’s most advanced N+3 process.<br>The timing is intriguing. TechInsights is being sold to a private equity firm, while SemiAnalysis’s revenue has already surpassed this established giant. Dylan chose this moment to strike, releasing a highly technical teardown report accompanied by real photos of chips taken at an Oregon lab.<br>The report’s headline is a bombshell: SMIC’s N+3 process has a minimum metal pitch (M0 pitch) of just 32.5nm, smaller than Intel’s latest 18A process used in the Panther Lake processor, which is 36nm.<br>Without EUV lithography machines, SMIC has achieved a metal pitch finer than Intel's?<br>If viewed solely by its title, this message would be enough to send the entire semiconductor industry into an uproar—but SemiAnalysis itself cooled things down in the second paragraph of its report, calling it a "cherry-picked metric," a deliberately selected indicator.<br>This article will break down and explain this analysis report for you,<br>Density tied, at a high cost

SMIC's N+3 process has indeed matched TSMC's N6 in transistor density.<br>The STEEL laboratory measured the Bohr density of N+3 at 113.4 MTr/mm² via TEM (transmission electron microscopy) cross-sectional analysis, slightly higher than TSMC’s N6 at 107.7 MTr/mm². The cell height decreased from 252 nm in N+2 to 228 nm, and the contact gate pitch (CGP) was reduced from 63 nm to 57 nm. Taken together, these figures indicate that SMIC has achieved logic density comparable to TSMC’s mature 7nm node using only DUV lithography, without EUV.<br>What is the cost?<br>SMIC's M0 layer uses self-aligned quadruple patterning (SAQP), which involves patterning a single mask through four processing steps to achieve finer lines. TSMC's N6 requires only double patterning (SADP) for the same layer. Quadruple patterning means more masks, stricter overlay accuracy requirements, a more complex process flow, and higher costs.<br>SemiAnalysis directly observed the cost of SAQP in the cross-section: the N+3 M0 trench exhibits a distinct inverse trapezoidal profile (narrower at the bottom than at the top), with a clear barrier layer enrichment zone at the trench bottom. While this morphology aids copper filling, process control becomes significantly more challenging at this 32.5nm pitch.<br>Think of it this way: SMIC is printing the same denomination of bills as TSMC, but each note costs several times more to produce—and carries much higher yield risk. The density is the same, but the economics are completely different.<br>Kirin 9030: Squeezing every inch of silicon under constrained conditions

Huawei HiSilicon's chip design capabilities are a story of another dimension.<br>In terms of chip area, the Kirin 9030 is nearly identical to its predecessor, the 9020 (approximately 140mm²), but it packs in more components: the CPU has been upgraded from 1 big core + 3 medium cores to 1 big + 4 medium cores, the GPU has increased from 4 to 6 compute units, and an additional Tiny core has been added to the NPU. All levels of cache have been expanded. The N+3 process density improvement enables Huawei to fit more logic units into the same chip size.<br>In terms of performance, the STEEL Lab cites publicly available benchmark data to clearly position the Kirin 9030: its GPU performance (Maleoon 935) is roughly on par with flagship chips from 2022, achieving a 70% improvement over the previous generation in 3DMark Wild Life Extreme scores, slightly surpassing the Snapdragon 8+ Gen 1, but still lagging behind the current flagship Snapdragon 8 Elite Gen 5 by a factor of 2.4 to 2.6 times.<br>The CPU situation is even more telling. The big core, TaiShan Prime, has an IPC roughly on par with the Arm Cortex-X2, a 2021 design. Apple’s M1 Firestorm core, released in 2020, still leads by 35%. The latest Apple M5 P-core outperforms it by 60% in IPC, with an absolute performance advantage of 2.7 times.<br>The root of the gap lies not in design, but in manufacturing. Apple and...