Guide to the TD4 4-bit DIY CPU | Hey There Buddo!

I bought a cute little 4 bit cpu kit from Aliexpress called the TD4. It has 2 registers, some LEDs, and 16 bytes of program ROM. Quite limited but still very cool and teaches a lot of principles of computer architecture.

The documentation, schematics, and pictures for this cpu are here https://github.com/wuxx/TD4-4BIT-CPU. It’s a little sparse though. I can imagine a student getting overwhelmed. So I thought it would be helpful to write some longer form notes.

Building

We took two sessions just soldering it up.

This image

plus the schematic were enough instructions such that it wasn’t too hard.

The directionality of the surface mount diodes gave us pause, but we used a diode tester functionality in our multimeter to figure it out. The tiny green line on the front of the diode is towards the bottom of the board. I believe the line was on the back of the diode was towards the top, but it is soldered down now so I can’t check.

The thing that gave us the most trouble was soldering on the USB connector. I’d advise doing this before putting on the IC sockets, because it got in the way of the iron. The middle pins of the USB are unconnected, so you can just blast them if need be. The USB is only for power.

Which chip goes where can be seen by inspecting the schematic for part number and IC number. The notch aligns with the notch printed on the PCB board. It basically worked the first time, minus an intermittent power connection on the usb.

Soldering all those diodes sucked.

How it Works

At a a high level here’s how it works

The program ROM is a bank of 16 dip switches. This is the entire size of programs available to you, which makes it tricky to do much. Pins 5-8 of each dip switch are an opcode, selecting between ADD, MOV, IN, OUT, JNC, JMP instructions. These bits go through some combinatorial circuit to control

What signal enters the addition unit (input operand of instruction)

Which register latches in the output of the addition unit. (The output operand of the instruction)

Bits 1-4 of the dip switch are the immediate value for the instruction, which is always piped into the adder.

The data selector can also select a hard wired zero signal (ground). This is used for example by the MOV A,Im instruction. This MOV instruction is implemented by adding Im to 0 and clocking the result into A.

The order of the immediate and command bits is a bit confusing. Sometimes it feels like they are reversed. The least significant bit is the low labelled one on the dip switch. For example, the value 3 is entered in as 1100 on the first 4 bits of the dip switch.

A Little Deeper

Address Decoder

The address decoder chip IC11 is a demultiplexer that takes in 4bit signal and drives the one of it’s 16 output signals low that corresponds to this number. When driven low, current can flow through that dip bank’s diodes if the dip switch is connected. Otherwise, pullup resistors R21-R26 keep the signal high.

IC12 is essentially a buffering inverter circuit for the result of the ROM.

Command Decoder

The command bits are translated by discrete combinatorial logic chips in IC8 and IC10 into not_LOAD0,1,2,3 and SEL_A/SEL_B signals. Really, not_LOAD0,1,2,3 could be called not_LOADA,B,Out,PC since that is what they are hooked up to.

instruction<br>bit7-bit4<br>bit3-bit0<br>SEL_B<br>SEL_A<br>#LOAD0/A<br>#LOAD1/B<br>#LOAD2/IN<br>#LOAD3/PC

ADD A, Im<br>0000<br>Im

MOV A, B<br>0001<br>0000

IN A<br>0010<br>0000

MOV A, Im<br>0011<br>Im

MOV B, A<br>0100<br>0000

ADD B, Im<br>0101<br>Im

IN B<br>0110<br>0000

MOV B, Im<br>0111<br>Im

OUT B<br>1001<br>0000

OUT Im<br>1011<br>Im

JNC Im<br>1110<br>Im

JNC Im<br>1110<br>Im

JMP Im<br>1111<br>Im

Src

Data Selector

SEL_A and SEL_B are wired into the data selector chips IC6 and IC7. They select from 4 possible options,

In Operand

In

Zero

The Zero signal is hardwired to ground.

Adder

The 4 bits selected output to the Adder chip IC8, which also receives the immediate bits1-4 from the ROM bank selected. A side note, The immediate bits are read by more instructions than might be apparent from their pneumonic. For example, OUT B actually still adds in the immediate. This functionality could be useful but also confusing. By default, zero out the immediate bits if you don’t want them.

Registers

The registers A,B,Out,PC are all counter chips. Only PC has the counting functionality enabled. On the edge of the clock signal, if the not_LOADx signal is low, data will latch in from pins A,B,C,D into the output pins QA,QB,QC,QD. JMPs are implemented by moving values into the PC register, which is fed back into the ROM address decoder.

Carry Flip Flop

An interesting piece is the Carry circuit which has a D flip flop for storing the overflow carry bit from the previous operation. This is needed to implement the JNC “jump if no carry” functionality. This operates by feeding into the command decoder circuit and disabling the LOADPC coming from the instruction if there is a carry.

Note that there appears to be a error on this...