Can LLMs Verify PCB Designs? The Results Were Mixed Back to Blog

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1. Why We Tested LLMs for PCB Verification

2. Test Setup: Real Boards, Real Data

3. What Actually Worked (With Major Caveats)

4. What Failed Completely

5. Honest Conclusions: Where LLMs Stand Today

6. Conclusion

Why We Tested LLMs for PCB Verification

PCB design verification is exhausting. A comprehensive design review for a complex board involves checking 200+ individual parameters across 11 major verification phases. As hardware engineers, we wondered: could large language models like ChatGPT and Gemini help automate even a fraction of this work?

The promise seemed reasonable. LLMs can analyze code, understand technical documentation, and reason about complex systems. PCB design data is structured and follows clear rules. Why couldn't an LLM review a pcb design, check component placement, or flag routing violations?

So we decided to test this hypothesis with real hardware: two STM32-based boards with varying complexity levels. We are keen to use LLMs in our PCB automation workflows. These experiments with ChatGPT and Gemini were our first step: can they actually verify a design?

Test Setup: Real Boards, Real Data

Test Subjects

STM32 Boards Tested

LLM Platforms (ChatGPT & Gemini)

336<br>Components (Largest Board)

Layer Count (Complex Board)

Board 1: STM32 Avionics Board (Simple)

Platform: KiCad design files

MCU: STM32H7 (avionics application)

Complexity: 4 layer embedded hardware board

Source: Open-source Terrapin Rocket Team design

Why chosen: Moderate complexity, representative of typical embedded projects

Board 2: STM32L496G-DISCO (Complex)

Platform: Altium Designer

Components: 336 total (including 169-pin BGA)

Layer count: 6 layers

Dimensions: 70mm x 92mm

Features: LCD, Audio, Sensors, USB, Arduino headers, multiple power rails

Why chosen: High complexity, mixed-signal design, real-world reference board

Board overview used for both LLM test runs

Placement reference shared with both Gemini and GPT

Front layer routing snapshot

Back layer routing snapshot

Power layer shared for PDN discussions

Ground layer continuity reference

Annotated schematic page 1 provided to LLMs

Annotated schematic page 2 provided to LLMs

LLM Platforms Tested

ChatGPT: OpenAI's web interface (accessed via browser, no API calls)

AI Studio (Gemini): Google's Gemini models via web interface

⚠️ Important Testing Note

We used the free web interfaces for both platforms, not API access. This means we faced context window limitations and couldn't process entire designs in single requests. All data had to be manually prepared and fed to the LLMs in manageable chunks.

How We Prepared the Data

Data Input Methods

Schematics: Converted to high-resolution images with clear component labels and net names visible

PCB Layout: Screenshots of placement with component reference designators and silkscreen data

Layer Information: Individual layer views with explicit labeling of signal, power, and ground layers

BOM Data: Component list with part numbers, values, and package information

Labeled Diagrams: Manually annotated placement views showing functional groupings

First key insight from our testing: LLMs need good resolution images to understand the context. The data needs to be extensively labeled and annotated for the models to understand PCB designs. Raw Gerber files, unprocessed screenshots, or complex multi-layer views without explicit labels resulted in complete confusion.

What Actually Worked (With Major Caveats)

✅ Component Placement Review with Labeled Diagrams

Result: Moderate Success

When we provided clearly labeled placement diagrams showing component groups, reference designators, and functional blocks, both ChatGPT and Gemini could:

Rate overall placement quality on a subjective scale

Identify obvious issues like components placed outside board outline

Recognize when power management circuits were grouped together

Comment on decoupling capacitor proximity to ICs (when explicitly labeled)

Limitation: This only worked when we spent significant time creating labeled diagrams. The LLMs couldn't extract this information from raw PCB files or unlabeled screenshots.

Gemini 3 Pro placement commentary on the avionics board snapshot

ChatGPT 5.1 placement review (part 1 of 3)

ChatGPT 5.1 placement review (part 2 of 3)

ChatGPT 5.1 placement review (part 3 of 3)

✅ Power Network and Ground Layer Analysis

Result: Worked When Explicitly Labeled

With heavily annotated power plane views, the LLMs could:

Identify different power domains (3.3V, 1.8V, 5V, etc.)

Comment on ground plane continuity (when we highlighted problem areas)

Limitation: Without labels explicitly stating "this is 3.3V power plane" or "this is ground plane," the LLMs couldn't distinguish power layers from signal layers.

Gemini 3 Pro notes on the labeled power and ground layers

ChatGPT 5.1 PDN review (part 1 of 3)

ChatGPT 5.1 PDN review...