GitHub - GrieferPig/esp32-s31-linux: Porting MMU Linux to ESP32-S31 · GitHub
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GrieferPig
esp32-s31-linux
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Folders and files<br>NameNameLast commit message<br>Last commit date<br>Latest commit
History<br>7 Commits<br>7 Commits
bootloader
bootloader
busybox @ 221e03b
busybox @ 221e03b
docs
docs
initramfs
initramfs
linux-6.12 @ ce357af
linux-6.12 @ ce357af
opensbi @ d111995
opensbi @ d111995
.gitignore
.gitignore
.gitmodules
.gitmodules
README.md
README.md
build_busybox_s31.sh
build_busybox_s31.sh
build_opensbi_s31.sh
build_opensbi_s31.sh
build_s31_linux.sh
build_s31_linux.sh
flash.sh
flash.sh
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Linux 6.12 for ESP32-S31
An attempt to port MMU Linux to S31's architecture (RV32IMAFBCNSUX).
Module tested: ESP32-S31-WROOM-3 E1H16R16V (ESP32-S31 Core Board).
Example boot log
Porting progress
Busybox init
USB UART I/O
Everything else not listed are not working (for now).<br>Also check out these command outputs.
Todo
Cache driver
Flash driver
Todo: add more todos
S31 Quirks
(For more hardware references, see docs/ folder)
This port was done before S31 TRM is available, therefore these guessworks were made:
CLIC v. PLIC v. CLINT
S31 uses CLIC and CLINT similar to P4. Linux expects PLIC. Therefore a custom CLIC driver is needed. I referenced this CLIC patch from TODO: I forgot where the patch come from to get the CLIC working.
Also, standard RISC-V interrupt CSRs are not usable, presumably because, from P4's TRM, CLINT interrupts are routed to CLIC and mtvec.MODE is hardwired to 0x3 (CLIC mode). Patches needed to make OpenSBI interrupts work.
S mode
S31's supervisor mode is not standard and has absolutely no usage in ESP-IDF so a lot of these CSR uses were mostly guessed from either P4's TRM or CSR probing (see docs/). For example, the use of sclicbase(?) and the lack of sie.
S31 implemented SCLIC (Supervisor CLIC?) which is confusing since there is no known standardization; According to all laws of esp-idf, mcliccfg.NMBITS is not writable. IT IS WRITABLE! And setting it to 0b01 enables writes to the clicintattr[i].MODE field and thus enabling the use of S-mode interrupts.
OpenSBI and Linux XIP
To save the precious 16MB PSRAM memory, OpenSBI was modified to use XIP in flash and internal SRAM (hence the 3915901 KB firmware size in OpenSBI banner, since flash and SRAM mappings are not continuous).
In mainline linux, XIP support on RISC-V was removed, so 6.12 was used instead which has proper XIP support.
Appendix
(as of 7/3/26)
# cat /proc/cpuinfo<br>processor : 0<br>hart : 0<br>isa : rv32imafc_zicntr_zicsr_zifencei_zca_zcf_zbb<br>mmu : sv32<br>uarch : espressif,esp32s31<br>mvendorid : 0x612<br>marchid : 0x80000003<br>mimpid : 0x1<br>hart isa : rv32imafc_zicntr_zicsr_zifencei_zca_zcf_zbb
# uname -a<br>Linux (none) 6.12.0-00036-gdccf9c1b2c4f-dirty #30 Thu Jul 2 23:48:23 CST 2026 riscv32
# free -h<br>total used free shared buff/cache available<br>Mem: 15004 1892 12784 0 328 12108<br>Swap: 0 0 0
# ps -aux<br>1 0 380 S /bin/sh -i<br>2 0 0 SW [kthreadd]<br>3 0 0 SW [pool_workqueue_]<br>4 0 0 IW [kworker/0:0-eve]<br>5 0 0 IW
# cat /proc/meminfo<br>MemTotal: 15004 kB<br>MemFree: 12788 kB<br>MemAvailable: 12112 kB<br>Buffers: 0 kB<br>Cached: 328 kB<br>SwapCached: 0 kB<br>Active: 4 kB<br>Inactive: 32 kB<br>Active(anon): 4 kB<br>Inactive(anon): 32 kB<br>Active(file): 0 kB<br>Inactive(file): 0 kB<br>Unevictable: 328 kB<br>Mlocked: 0 kB<br>SwapTotal: 0 kB<br>SwapFree: 0 kB<br>Dirty: 0 kB<br>Writeback: 0 kB<br>AnonPages: 52 kB<br>Mapped: 208 kB<br>Shmem: 0 kB<br>KReclaimable: 0 kB<br>Slab: 756 kB<br>SReclaimable: 0 kB<br>SUnreclaim: 756 kB<br>KernelStack: 352 kB<br>PageTables: 24 kB<br>SecPageTables: 0 kB<br>NFS_Unstable: 0 kB<br>Bounce: 0 kB<br>WritebackTmp: 0 kB<br>CommitLimit: 7500 kB<br>Committed_AS: 304 kB<br>VmallocTotal: 524288 kB<br>VmallocUsed: 12 kB<br>VmallocChunk: 0 kB<br>Percpu: 32 kB
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Porting MMU Linux to ESP32-S31
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