A CIRCT Project Tutorial | Samuel Coward

A CIRCT Project Tutorial

My ARITH 2026 tutorial and demo hopefully convinced a few folks to try building hardware with CIRCT!

ARITH Tutorial Day

Just back from ARITH 2026 in Fulda, Germany, where they introduced a new Tutorial Day!<br>Together, Louis and I, gave the attendees first a brief introduction to MLIR and CIRCT, then got them working hands-on building, optimizing and verifying ASIC hardware designs.

If you want to have a go at home, all the tutorial materials can be found in our public repo.<br>To play through the tutorial, you’ll need to use either a docker build or the VScode dev-containers extension.<br>The goal was to give researchers and industrial engineers a short teaser of the various CIRCT capabilities, people seemed to find it interesting at least, and potentially even useful.

In this blog post I’ll give a short description of CIRCT and describe the features we presented (that way you can decide if you should care or not…).

What is CIRCT?

CIRCT (Circuit IR Compilers and Tools) is an open-source compiler infrastructure project for digital hardware design.<br>It provides reusable compiler dialects, optimizations, and passes built on MLIR.<br>CIRCT enables hardware designers and compiler developers to express, transform, and generate circuit representations for FPGAs, ASICs, and other digital systems.

Key Features:

A hardware-centered IR and dialect ecosystem for digital circuit design.

Reusable passes for lowering, verification, and code generation.

Integration with MLIR and LLVM for compiler-based hardware flows.

Support for multiple input formats and backends, including FIRRTL, HW, and system-level representations.

CIRCT Inspiration

LLVM and MLIR: using compiler infrastructure patterns to make hardware transformation passes composable.

Hardware description languages like Chisel.

The desire to unify hardware and software compiler techniques in a shared framework.

CIRCT aims to make hardware compiler development more agile, enabling researchers and engineers to experiment with new optimizations and hardware dialects.

Tutorial Content

The tutorial introduces a range of different tools and optimization passes that can be used to synthesize and verify combinational circuit designs expressed in System Verilog.<br>First you’ll compile a Verilog design with circt-verilog, producing a snippet of CIRCT IR, that will look a lot like LLVM/MLIR if you’ve ever worked in these software compiler frameworks.

hw.module @fma(in %a: i4, in %b: i4, in %c: i4, out d: i9){<br>%c0_i5 = hw.constant 0 : i5<br>%0 = comb.concat %c0_i5, %a : i5, i4<br>%1 = comb.concat %c0_i5, %b : i5, i4<br>%2 = comb.mul %0, %1 : i9<br>%3 = comb.concat %c0_i5, %c : i5, i4<br>%4 = comb.add %2, %3 : i9<br>hw.output %4 : i9

Given some IR, we then move onto optimization which we automate with passes, that literally pass over the IR and make small incremental changes (usually until some fixed point is reached).<br>CIRCT has loads of passes built in, and you apply them using circt-opt.<br>For those wanting to extend CIRCT, a great starting point is trying to extend an existing pass with a new optimization.

Since most ASIC designers, are inherently sceptical (and rightly so), we then describe how one can verify the correctness of the transformation you just applied using circt-lec.<br>The circt-lec tool takes two IR modules and checks that they are logically equivalent by formulating an SMT problem, which can be externally validated with your favourite SMT solver (Z3, Bitwuzla etc).<br>Lastly, for those wanting to integrate into an existing EDA flow, we learn how to generate Verilog using firtool.

In the second part of the tutorial, we focused more on my work developing a datapath synthesis engine for CIRCT.<br>In this part, we introduced circt-synth that leverages redundant number representations to produce realy efficient datapath netlists that can outperform the much more mature Yosys synthesis tool.<br>To give a final flavour of what can be done when combining MLIR and CIRCT, Louis demoed his high-level synthesis flow from Python code to a full chip layout.

Whilst preparaing for the tutorial, I discovered markdown slides in Obsidian, which is why the README is a little terse!

ARITH 2026 Summary

In addition to the tutorials, ARITH is the main venue for research into computer arithmetic. Below is a list of my favourite papers from the conference (all papers are freely available from the ARITH program):

A Conflict-Aware Learning Approach to SCA Verification for MAC Architectures

Hopeful that this might provide a way to verify the outputs of circt-synth much faster!

Novel Aspects of IEEE SA P3109 Arithmetic Formats for Machine Learning

Describing all the details behind the upcoming IEEE standard for AI number formats

Efficacy of Pipelining to Reduce Energy of Floating-Point Adders and Multipliers

An awesome way to visualize the switching and glitch frequency as a function of logical depth

Not available online but Erin...