[2607.11262] GPU-Tile-Sim: A Tile-Centric GPU Simulation Framework for LLM Hardware-Software Co-Design

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Computer Science > Distributed, Parallel, and Cluster Computing

arXiv:2607.11262 (cs)

[Submitted on 13 Jul 2026]

Title:GPU-Tile-Sim: A Tile-Centric GPU Simulation Framework for LLM Hardware-Software Co-Design

Authors:Yitong Ding, Jiawei Huang, Renyang Guan, Yangjie Zhou, Zihan Liu, Yu Feng, Shixuan Sun, Mingyi Guo, Jingwen Leng, Jian Weng<br>View a PDF of the paper titled GPU-Tile-Sim: A Tile-Centric GPU Simulation Framework for LLM Hardware-Software Co-Design, by Yitong Ding and 9 other authors

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Abstract:Modern LLM (large language model) workloads increasingly rely on optimized GPU kernels through hardware-software co-design. These kernels achieve high-performance through fine-grained dependency scheduling and computation-memory overlap. As such, they incur new challenges on existing GPU performance models. Instruction-driven simulators are costly to adapt to evolving architectures, while analytical models are too coarse to capture kernels' characteristics. We propose GPU-Tile-Sim, a tile-centric GPU simulation framework for LLM hardware-software co-design. The key insight is that modern LLM kernel performance is governed less by individual instruction latency than by the dependency structure that controls execution order and overlap. Accordingly, GTSim represents kernel execution as a warp-level tile graph whose nodes capture tile-level operations and whose edges encode data and ordering constraints. Using this representation, we design an automatic tile-graph frontend and a graph-driven simulation backend. We evaluate GTSim on representative GEMM, attention, and end-to-end LLM inference workloads. On A100 and H100 across both conventional and highly optimized kernels, GTSim achieves high performance-modeling accuracy (MAPE, Mean Absolute Percentage Error, 1.22%--8.71%). We further extend GTSim to Blackwell with preliminary validation, and demonstrate its effectiveness in analyzing software and architectural design choices.

Comments:<br>14 pages, 14 figures. Accepted to MICRO 2026

Subjects:

Distributed, Parallel, and Cluster Computing (cs.DC)

Cite as:<br>arXiv:2607.11262 [cs.DC]

(or<br>arXiv:2607.11262v1 [cs.DC] for this version)

https://doi.org/10.48550/arXiv.2607.11262

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arXiv-issued DOI via DataCite (pending registration)

Submission history<br>From: Yitong Ding [view email]<br>[v1]<br>Mon, 13 Jul 2026 08:45:24 UTC (934 KB)

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