Information to Atoms - SubstrateSkip to main content<br>Announcement, Technical<br>Information to Atoms<br>How Google DeepMind's AlphaEvolve improved the speed of Substrate's computational lithography stack by 680% and reduced compute costs by 97%, enabling the simulation and printing of the most demanding layers in advanced semiconductor devices.<br>April 7th 2026·Share<br>Simulated P24 M1 pattern<br>Printed P24 M1 (12 nm CD) with Substrate's X-ray lithography

Over the past several months, AI models fueled by the growing compute infrastructure that powers them have advanced at an incredible pace. This virtuous cycle of model progress driven by greater computing power continues to accelerate, with fabless semiconductor companies now incorporating AI models into their design processes, directly enabling future model improvement cycles.<br>One of Substrate's founding convictions is that we would reach a point where AI models and the chips that power them would co-evolve—both building each other to compound improvements and shorten time-to-market. By extending this co-design process all the way down to the fabrication of semiconductors themselves, we allow AI to build itself at the atomic level, offering access to intelligence limited only by physics.<br>The recent addition of Google DeepMind's AlphaEvolve, a Gemini-powered coding agent for designing advanced algorithms, to our work has given us an even clearer idea of how rapid this model-to-fabrication iteration loop will be.<br>Lithography is the science of information transfer<br>When printing patterns mere tens of atoms wide, anything and everything can affect the accuracy of information transfer from the mask to the wafer. Even the vibrations from nearby footsteps are enough to blur patterns, and at X-ray wavelengths, air itself will absorb these photons. To ensure the patterning fidelity that advanced semiconductors need, you must master all of the physics governing the lithographic process.<br>To achieve this, we built a powerful computational lithography stack that includes processes like inverse lithography technology (ILT)1, which works backward from desired patterns to design optimal masks, and optical proximity correction (OPC)2, which adjusts mask designs to correct for distortions during printing. Our end-to-end framework co-optimizes these and other factors into our optics, masks, and patterns to ensure we print the highest-quality, highest-resolution structures possible.<br>Using X-ray lithography to produce the smallest, most intricate structures humans have ever made requires simulating the paths of many trillions of photons as they bounce across optics, masks, and their interactions with the thin layer of light-sensitive photoresist on a silicon wafer. This level of simulation is extraordinarily computationally intensive.<br>Traditionally, CPU solvers would take days to weeks, prohibiting their use for achieving realistic end-to-end physics fidelity and making it difficult to model a process with near certainty. We design everything Substrate builds for accelerated computation from day one; without leveraging the very latest computational power, our work would not be possible. And, as with any large computational task, we relentlessly optimize scalability, cost, and runtime.<br>To give a sense of scale, at 1 nanometer (nm) resolution, a simulation of a printed layer of a full-sized semiconductor die would be hundreds of terapixels (a terapixel is a million million pixels). In reality, we are forced to simulate smaller, but still representative, areas. Even then, the tensor operations involved are enormous, and quickly become a complex, distributed, accelerated-computing problem.<br>Discovering algorithmic leaps with AlphaEvolve<br>Over a couple of months, we worked closely with the Google team to integrate AlphaEvolve into our efforts and apply it to some of our most important challenges, including optimizing our computational lithography framework. Initially accelerated by GPUs and now also by TPUs, we have built an end-to-end, differentiable, and scalable simulation stack that handles the most complex physics ever used in semiconductor production.<br>Below are simulations and printed-on-silicon images from a scanning electron microscope (SEM) of a complex metal one (M1) layer printed in a single exposure with Substrate's X-ray lithography tool, enabled by AlphaEvolve-optimized simulations. The printed patterns are equivalent in resolution to "high numerical aperture" (High-NA) lithography, which is equivalent to the requirements of the 2 nm semiconductor node.<br>Printed P24 M1 pattern with measurements<br>Simulated P24 (12 nm CD) claw pattern<br>Printed P24 M1 pattern<br>Simulated dose study<br>OPC pattern

The M1 layer is the most complex layer of a chip, as it contains routing to connect the transistors below and local interconnects for standard cells, making it by far the most demanding lithographic layer to print. As the sharp 90-degree corners and arbitrary 2D shapes at a 24 nm pitch3 (12 nm...