RosaicLabs, Atom RTL, and 32-Tile AMX: Trying to Piece Together a x86 Puzzle

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RosaicLabs, Atom RTL, and 32-Tile AMX: Trying to Piece Together a x86 Puzzle

George Cozma<br>Jul 31, 2026

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Hello you fine Internet folks,<br>Today we are talking about one of the stranger x86 stories I have seen in a while. According to both SemiAccurate and Reuters, Intel is giving a new startup called RosaicLabs access to the register transfer language code for its Atom CPU technology. That is already a massive departure for a company that has historically guarded both its x86 license and CPU-core RTL very closely.<br>Two days before Reuters published its story, however, Phoronix spotted a very weird post on the Linux kernel mailing list. The post describes working x86 implementations with 16 and 32 Advanced Matrix Extension (AMX) tile registers, compared with eight tiles on Intel’s shipping AMX implementations. It was written by the same developer who said in October 2025 that a “corporate entity other than Intel/AMD” were already using its own x86 opcodes, CPUID range, and model-specific register range.<br>There are no public sources connecting Rosaic to that mystery x86 implementation. I want to be very clear about that from the start.<br>Still, an Atom-derived x86 core attached to a much larger matrix engine would make an awful lot of architectural sense for a startup staffed by Rivos veterans. Intel’s involvement would also answer the rather important question of how a new American company could legally build a custom x86 processor in the first place. So let’s dig into what we know, what the Linux posts actually say, and where the speculation begins.<br>Intel Lets Atom Out of the House

Both Reuters and SemiAccurate report that Intel has started providing Atom technology to RosaicLabs Inc., a startup incorporated in Delaware in May 2026. Rosaic is led by Amarjit Gill, a longtime semiconductor executive and investor who worked with current Intel CEO Lip-Bu Tan to assemble the founding team at Rivos. Reuters also says Rosaic’s team includes other Rivos veterans, including former Rivos finance chief Amit Parikh.<br>The reported arrangement goes well beyond an architectural license, with Intel reportedly supplying register transfer language, or RTL, code. RTL describes the logic and data movement inside a digital design in a form that can be simulated, verified, modified, and eventually synthesized into physical gates for a selected manufacturing process. In less technical terms, Intel is not merely giving Rosaic permission to execute x86 instructions. It is reportedly handing over the source-level description of an Atom CPU design.<br>That does not necessarily mean Rosaic gets every piece of an Intel processor. Reuters does not identify the Atom generation, the included cache and interconnect logic, the manufacturing process, or the contractual limits on modifying and shipping the design. Access to CPU-core RTL is also not the same as receiving a complete, tapeout-ready system-on-chip.<br>Even with those caveats, this is highly unusual. Intel has licensed x86 technology in limited circumstances before, but it has not operated like Arm, SiFive, or another merchant CPU-IP supplier. If this arrangement becomes a repeatable business model instead of a one-off deal, it would represent a fundamental change in how Intel monetizes its CPU designs. Intel has previously signaled that it wants to make more IP available through Intel Foundry, so this deal may be part of that broader strategy.<br>Rosaic itself remains almost completely in stealth. Reuters found no company website or LinkedIn page with any useful information, while an amended July filing reportedly gives the company room to raise a $10 million seed round. That is enough money to assemble a small early-stage team, but it is nowhere near enough to take a large, leading-edge processor from a blank sheet of paper to mass production.<br>Receiving an existing CPU core changes that equation by letting Rosaic spend its engineering budget on the parts that differentiate the product instead of rebuilding an x86 frontend, execution engine, memory-ordering machinery, privilege model, and software ecosystem from scratch.<br>The Other Mystery x86 Processor

The first useful clue appeared in October 2025. Longtime x86 researcher Christian Ludloff posted a message to the Linux kernel and GNU Binutils mailing lists saying he had been asked to relay information about opcode allocations already “in active use by a corporate entity other than Intel/AMD.”<br>The original Binutils post lists several reclaimed or otherwise unused opcode regions, an E000_xxxx CPUID range, and a matching E000_xxxx MSR range. Ludloff said these ranges were already in active use, implying that this was more than an academic proposal.<br>As Phoronix noted at the time, that raises two questions: Who was building the processor, and what legal right did it have to implement x86? Existing x86 companies such as...