[2607.27259] CircuitProver: Agentic Lean 4 Theorem Proving with Reusable Circuit Proof Library for Hardware Verification

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arXiv:2607.27259 (cs)

[Submitted on 29 Jul 2026]

Title:CircuitProver: Agentic Lean 4 Theorem Proving with Reusable Circuit Proof Library for Hardware Verification

Authors:Ziyi Yang, Wenji Fang, Chen Chen, Zhiyao Xie, Hongce Zhang<br>View a PDF of the paper titled CircuitProver: Agentic Lean 4 Theorem Proving with Reusable Circuit Proof Library for Hardware Verification, by Ziyi Yang and 4 other authors

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Abstract:Modern integrated circuits (ICs) are becoming increasingly complex, making functional verification a major bottleneck. The dominant hardware formal verification methodology, model checking, verifies each design instance separately and exposes only pass/fail results, so the reasoning behind a proof stays locked inside solver heuristics and is repeatedly reconstructed across related designs. Interactive theorem proving instead yields explicit, reusable proof artifacts, but applying it to hardware remains largely manual, demanding expert effort for formalization, invariant discovery, and proof development. In this paper, we present CircuitProver, an agentic Lean 4-based verification framework supporting proof-accumulation and parameterized verification. CircuitProver automatically translates parameterized hardware designs and their natural language specifications into executable Lean 4 models. It then iteratively constructs machine-checked proofs through Lean feedback to establish that the hardware code complies with the specification. The proving traces and verified theorems are distilled into reusable libraries, where proving strategies guide future agent reasoning and verified lemmas support formal proof reuse across related hardware verification tasks. We further introduce the first benchmark suite for evaluating agentic hardware theorem proving, covering diverse parameterized hardware designs, specifications, proof tasks, and evaluation metrics. Across 63 tasks, CircuitProver successfully proves all benchmarks, while a vanilla agent solves 92.1% of them and requires twice as many proof rounds on average. Ablation studies show that accumulated proof knowledge reduces redundant proof construction across related verification tasks, reducing proof length by 16.3% and verification time by 23.2%.

Subjects:

Logic in Computer Science (cs.LO); Hardware Architecture (cs.AR)

Cite as:<br>arXiv:2607.27259 [cs.LO]

(or<br>arXiv:2607.27259v1 [cs.LO] for this version)

https://doi.org/10.48550/arXiv.2607.27259

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arXiv-issued DOI via DataCite (pending registration)

Submission history<br>From: Ziyi Yang [view email]<br>[v1]<br>Wed, 29 Jul 2026 03:25:07 UTC (1,235 KB)

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