SK hynix Unveils First HBF Standard Specifications with Sandisk, Presenting AI Memory Solutions at ‘FMS 2026’ – SK hynix Newsroom

SK hynix Newsroom | SK hynix Unveils First HBF Standard Specifications with Sandisk, Presenting AI Memory Solutions at ‘FMS 2026’

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SK hynix Unveils First HBF Standard Specifications with Sandisk, Presenting AI Memory Solutions at ‘FMS 2026’

▪ First HBF standard showcased within six months of consortium launch, expanding the ecosystem with participation from Google, Tenstorrent

▪ Keynote by SK hynix Executive Vice President Kim Chun-sung and Vice President Kang Uk-song on opening day, offering solutions for next-generation AI infrastructure based on ‘Tiered Memory’

▪ Panel discussion with Google DeepMind·Sandisk on ‘Breaking the Memory Wall with HBF’

▪ Tenth-generation (V10) 375-layer 4D NAND unveiled for the first time at exhibition booth, offering a 2.5 times increase in power efficiency

▪ “Expanding the boundaries of memory and storage through HBF technology… contributing to new architectures that boost system efficiency”

▲ SK hynix announced on August 4 that it has unveiled the first standard specification for High Bandwidth Flash (HBF), a next-generation storage technology, in collaboration with Sandisk through the OCP.

Seoul, August 4, 2026 – SK hynix Inc. (or “the company”, www.skhynix.com) announced today in collaboration with Sandisk that it has unveiled the first standard specifications for High Bandwidth Flash (HBF), a next-generation storage technology.

The announcement coincides with the opening of ‘FMS (Future of Memory and Storage) 2026,’ held at the Santa Clara Convention Center in California from August 4 to 6 (local time). The company is set to present HBF as a key technology to overcome memory bottlenecks in the AI era through keynote speeches and panel discussions during the event.

HBF technology is a new memory layer between HBM and SSDs. It enables high-speed data transfer similar to HBM while significantly expanding capacity by leveraging NAND technology. With the expansion of AI inference driving a surge in data volumes to process, HBF is gaining attention as a technology that simultaneously resolves bandwidth and capacity scalability challenges.

This milestone comes about six months after launching the consortium in February this year, following the initial standardization partnership with Sandisk in August 2025. Capacity specifications cover up to 512GB based on two stack configurations (8-high and 16-high NAND dies). Bandwidth is categorized into three grades (Grade1~3), delivering scalable performance from approximately 0.4TB/s to 3.0TB/s.

A key highlight is the interconnect linking HBF technology and processors. HBF technology adopts UCIe*, an industry standard connection interface, laying the groundwork to flexibly integrate HBF technology across different processor types, including GPUs and CPUs.

* UCIe (Universal Chiplet Interconnect Express): An open standard interface specification designed for high-speed interconnection of heterogeneous semiconductor chiplets.

The standard also outlines ▲connection interfaces and electrical characteristics, ▲reliability and packaging guidelines for HBF die stack process, ▲software I/O guidelines.

The specification was disclosed through the Open Compute Project (OCP), world’s largest open data center technology initiative, positioning it as an open standard for the entire industry rather than a proprietary technology.

SK hynix plans to leverage this release to expand the adoption of HBF technology in the AI storage market and foster the surrounding ecosystem. With Google and Tenstorrent currently participating in the HBF consortium, the consortium aims to expand its reach while enhancing technical maturity and market acceptance based on open collaboration.

On the opening day of FMS 2026 (August 4, local time), SK hynix Executive Vice President Kim Chun-sung (Head of Solution Development) and Vice President Kang Uk-song (Head of Next Generation Product Planning) will deliver a joint keynote address, titled ‘Orchestrating Efficient AI Infrastructure through Tiered Memory in the Era of Agentic AI.’

As Agentic AI* rapidly commercializes, the volume of data to process is surging alongside growing demands for higher speed and efficiency. Recognizing that a single memory type cannot address these complex challenges, both speakers will present the necessity and future direction of a next-generation architecture based on ‘Tiered Memory’ a framework that connects and optimizes diverse memory types into a unified system.

* Agentic AI: Advanced Agent AI systems capable of autonomously setting goals, formulating plans, and executing tasks without human intervention.

On August 6, SK hynix Vice President Lim Eui-cheol (Head of Solution AT), Sandisk Vice President Rajeev Nagabhirava and Google DeepMind...