Deep Dive: Anthropic's Performance Take-Home (The One Claude Beat Humans At)

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Deep Dive: Anthropic's Performance Take-Home (The One Claude Beat Humans At) | Tristan TrouwenToday, Anthropic open-sourced their original performance engineering take-home. The task: optimize a kernel running on a custom VLIW SIMD processor simulator. The baseline takes 147,734 cycles . Claude Opus 4.5 got it down to 1,487 cycles - a 99x speedup that beat most humans.<br>I&rsquo;m Tristan (@trirpi), and I work on AI kernels. Let&rsquo;s break down how this whole system works.<br>The Architecture at a Glance#<br>This is a VLIW (Very Long Instruction Word) SIMD (Single Instruction Multiple Data) processor with a single core (older versions of the take-home had multiple cores). Let me break down what that means.<br>VLIW: Compiler-Scheduled Parallelism#<br>In a traditional processor, hardware figures out at runtime which instructions can run in parallel. In a VLIW processor, that job shifts to the compiler (or in this case, you).<br>The single core has multiple functional units that can all execute simultaneously:<br>UnitCountOperationsALU12 Scalar: +, -, *, /, ^, &, |, , >>, %, , ==VALU6 Vector (8 elements): same ops as ALULOAD2 load, vload (8 words), constSTORE2 store, vstore (8 words)FLOW1 select, jump, cond_jump, haltYou pack operations into instruction bundles . Each cycle, the processor executes one bundle, dispatching operations to all the units in parallel. If you only put one operation in a bundle, the other units sit idle. That&rsquo;s why the baseline is so slow.<br>Example bundle (executes in 1 cycle):<br>{"alu": [op1, op2, op3], "valu": [vop1, vop2], "load": [ld1, ld2]}

With 12 ALUs and 6 VALUs (each processing 8 elements), this single core can theoretically do 12 + 6×8 = 60 arithmetic operations per cycle.<br>Memory Hierarchy#<br>flowchart LR<br>subgraph mem["💾 MAIN MEMORY"]<br>DATA["Problem Data<br>(tree, indices, values)"]<br>end

subgraph scratch["📦 SCRATCH SPACE (1536 words)"]<br>REG["Works like registers<br>All ALU ops read/write here"]<br>end

mem |"LOAD/STORE<br>⚠️ 2 each per cycle"| scratch<br>Main Memory : Where the problem data lives. ALU/VALU can&rsquo;t access it directly.<br>Scratch Space : 1536 words of fast storage. All compute operations read/write scratch addresses.<br>Bottleneck : Only 2 loads and 2 stores per cycle. This is often the limiting factor, not compute.<br>The Execution Engines#<br>The processor has multiple engines , each capable of executing multiple slots per cycle. From problem.py:<br>SLOT_LIMITS = {<br>"alu": 12, # 12 scalar ALU operations per cycle<br>"valu": 6, # 6 vector ALU operations per cycle<br>"load": 2, # 2 load operations per cycle<br>"store": 2, # 2 store operations per cycle<br>"flow": 1, # 1 flow control operation per cycle<br>"debug": 64, # Debug operations (not counted)

What an Instruction Bundle Looks Like#<br>flowchart LR<br>subgraph bundle["📦 Instruction Bundle (1 clock cycle)"]<br>subgraph compute["Compute"]<br>ALU["alu:<br>('+', dest, a, b)<br>('-', dest, a, b)<br>('*', dest, a, b)<br>...up to 12"]<br>VALU["valu:<br>('*', vdest, va, vb)<br>('+', vdest, va, vb)<br>...up to 6"]<br>end<br>subgraph memory["Memory"]<br>LOAD["load:<br>('load', dest, addr)<br>('vload', vdest, addr)"]<br>STORE["store:<br>('store', addr, src)<br>('vstore', addr, vsrc)"]<br>end<br>subgraph control["Control"]<br>FLOW["flow:<br>('select', d, c, a, b)"]<br>DEBUG["debug:<br>('compare', loc, key)<br>(not counted)"]<br>end<br>end<br>An instruction is a Python dict mapping engine names to lists of operations. Here&rsquo;s a real example:<br>{"valu": [("*", 4, 0, 0), ("+", 8, 4, 0)], "load": [("load", 16, 17)]}

This executes three operations in one cycle :<br>Vector multiply: scratch[4:12] = scratch[0:8] * scratch[0:8]<br>Vector add: scratch[8:16] = scratch[4:12] + scratch[0:8]<br>Scalar load: scratch[16] = memory[scratch[17]]<br>The Problem: Batched Tree Traversal#<br>The kernel implements a batched tree traversal with hashing. Here&rsquo;s the flow:<br>flowchart LR<br>subgraph rounds["🔄 16 Rounds"]<br>R0["Round 0"] --> R1["Round 1"] --> R2["Round 2"] --> RN["..."]<br>end

subgraph batch["📊 Batch of 256 items"]<br>B0["Item 0"]<br>B1["Item 1"]<br>B2["Item 2"]<br>BN["..."]<br>end

subgraph ALGO["⚙️ Per-item computation"]<br>A1["idx = indices[i]"] --> A2["val = values[i]"]<br>A2 --> A3["node_val = tree[idx]"]<br>A3 --> A4["val = hash(val ^ node_val)"]<br>A4 --> A5["idx = 2*idx + (1 if even else 2)"]<br>A5 --> A6["if idx >= n_nodes: idx = 0"]<br>end

rounds --> batch<br>batch --> ALGO<br>From the reference kernel:<br>def reference_kernel(t: Tree, inp: Input):<br>"""<br>A parallel tree traversal where at each node we set<br>cur_inp_val = myhash(cur_inp_val ^ node_val)<br>and then choose the left branch if cur_inp_val is even.<br>If we reach the bottom of the tree we wrap around to the top.<br>"""<br>for h in range(inp.rounds):<br>for i in range(len(inp.indices)):<br>idx = inp.indices[i]<br>val = inp.values[i]<br>val = myhash(val ^ t.values[idx])<br>idx = 2 * idx + (1 if val % 2 == 0 else 2)<br>idx = 0 if idx >= len(t.values) else idx<br>inp.values[i] = val<br>inp.indices[i] = idx

Test configuration:<br>Tree height : 10 (2047 nodes in a perfect binary tree)<br>Batch size : 256 items processed<br>Rounds : 16 iterations<br>That&rsquo;s 256 × 16 = 4096 traversal steps, each...

cycle scratch load operations subgraph tree

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