Running Linux on Baochip-1x

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GitHub - pkoscik/baochip-linux: An attempt to boot mainline Linux on a stock Dabao board · GitHub

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Running Linux on Baochip-1x

My attempt to boot mainline Linux on a stock Dabao board. It works: the kernel executes in place out of RRAM, the whole system lives in 2 MiB of on-chip SRAM, and you get an interactive BusyBox shell over a serial console. It is also only that. There are basically no drivers.

Status

Subsystem<br>State

XIP kernel from RRAM, Sv32<br>yes

Serial console<br>yes - SBI API over UART2

Timer / clocksource / clockevent<br>yes - TICKTIMER via SBI, 100 kHz

Interactive shell, job control<br>yes - BusyBox as PID 1

Userspace ELF, fork, mmap, /proc<br>yes

Storage of any kind<br>no

Interrupt controller driver<br>no - the timer IRQ is handled in M-mode

UART driver<br>no - console goes through SBI

USB, SDIO, SPI, GPIO, BIO, RRAM MTD<br>no

Networking<br>no

Suspend, power management<br>no

The repos

Repo<br>What's in it

pkoscik/linux (rv32-xip)<br>patches on v6.19-rc5 that make XIP work on 32-bit RISC-V

pkoscik/xous-core (linux-mmode-stub)<br>the M-mode SBI stub that boots it

The board

The Baochip-1x is a Rust-first SoC, and the Dabao is its evaluation board.<br>It is designed to run Xous, a pure-Rust embedded OS, and it is not a Linux target in any sense - which is most of the fun.

Component<br>Detail

CPU<br>VexRiscv, RV32IMAC @ 700 MHz, M/S/U privilege, MMU

MMU<br>Sv32

Caches<br>16 KiB I + 16 KiB D, write-through

RRAM<br>4 MiB @ 0x6000_0000

SRAM<br>2 MiB @ 0x6100_0000

Package<br>WLCSP-71

Interrupts<br>no PLIC; a CSR-mapped array, 20 banks x 16 lines

Timer<br>no CLINT, no mtime, MTIP tied to zero in the RTL

Console<br>UDMA UART2 on PB13/PB14

Overview

boot1 -> M-mode SBI stub -> Linux (S-mode)<br>ROM xous xous-core XIP from RRAM<br>updater baremetal app data in SRAM">boot0 -> boot1 -> M-mode SBI stub -> Linux (S-mode)<br>ROM xous xous-core XIP from RRAM<br>updater baremetal app data in SRAM

SBI is emulated. There is no OpenSBI port. The bao1x has no CLINT, no PMP, one hart and no time CSR, so nearly everything OpenSBI provides is either absent or unused, and a port would mean stubbing most of it out. Instead there is a small M-mode stub built as a target of the baremetal app, which inherits its linker script, signing and UF2 packaging. It also emulates the missing time/timeh CSRs, and turns TICKTIMER's alarm into an injected mip.STIP, so Linux drives its own stock timer-riscv with no kernel patch.

The kernel has to run XIP, it is not an optimisation. Code and rodata are 1463 K against 2048 K of SRAM, before page tables, slab, or a byte of userspace, so a conventional build needs more RAM for its own text than the chip has in total. Executing it out of RRAM leaves 179 K of rwdata and bss in SRAM, and about 650 K free with a shell running.

Which is awkward, because RISC-V XIP was deleted from mainline in 9b3a2be84803 on the grounds that it kept breaking and therefore had no users. This is pinned to v6.19-rc5 and will not follow the tree forward.

Building

You need clang/lld, zig, rustup (riscv32imac-unknown-none-elf), dtc, python3, cpio and curl.<br>./setup.sh check tells you what is missing and refuses to continue if anything is.

git clone --recurse-submodules https://github.com/pkoscik/baochip-linux<br>cd baochip-linux<br>./setup.sh # check tools, fetch submodules, write the kernel config

./flash.sh busybox # bin/busybox-rv32-min, from source<br>./flash.sh demo # bin/demo-rv32, from initramfs/demo.c<br>./flash.sh all # stub + device tree + kernel, onto the board

Userspace has to be built first: the initramfs is compiled into the kernel image.

Note<br>The BAOCHIP volume only exists in bootloader mode. Hold BOOT while plugging USB or rebooting the board, and flash.sh will find it. Set VOL=out to write the images to a directory instead.

Flashing is just copying UF2 files onto a mass-storage volume - boot1 programs RRAM as the blocks arrive.

Booting it

Two consoles. The Xous REPL is on /dev/ttyACM0 over USB. Linux talks on UART2, which needs a 3.3 V USB-TTL:

Header pin<br>Signal<br>Adapter

15<br>PB14 / UART2TX<br>RX

16<br>PB13 /...

linux baochip rram mode kernel xous

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