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Two Bets on Standing Still, and a Dark Horse · Kernel Pryanic

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I first read about Taalas in February, in a Hacker News thread I opened expecting another inference startup with a benchmark chart. Instead it was a Toronto company that had taken Llama 3.1 8B and etched it into silicon - not loaded it, etched it, the weights laid down as physical transistors at the fab.

My first thought wasn't that this was new, it was that we've done this before. Groq had been working the same problem for years and stopped one step short, keeping the weights on the chip but still rewritable. The same question sits under both: how much of a model are you willing to make permanent in exchange for speed? Inside eight months, Nvidia had taken one of them and AMD the other.

That's the part worth paying attention to. Something quite significant is happening behind the curtains right about now, and it's easy to miss because it reads as chip news. Every previous time a workload left general-purpose hardware, it permanently changed who could afford to run it, and AI inference is somewhere in the middle of the same move. How far it goes isn't a fixed quantity waiting to be measured, because every part of the problem is still being designed - the models, the silicon, and, as it turns out, the way a model produces output at all.

We've seen this movie

Bitcoin mining went from CPUs to GPUs to FPGAs to purpose-built ASICs - application-specific integrated circuits, chips that do one job and nothing else - in four years. Each step traded flexibility for efficiency, and each was irreversible. When the first Avalon units shipped in 2013, GPU mining didn't get slower, it got pointless.

The pattern is everywhere now, and invisible precisely because it worked. YouTube transcodes video on its own Argos chips, which Google says beat its previous optimized software setup by 20 to 33 times. Network switching is Broadcom silicon. Your phone has a fixed-function block for H.265 decode, an ISP (image signal processor) for the camera, a Secure Enclave that does nothing else. It's what happens when a workload settles down enough to be worth casting in metal - and that condition is where this whole story ends up.

The wall they're all attacking

The thing GPUs spend most of their energy on during inference isn't math, it's moving weights. Every layer, every token, the weights come out of HBM (high-bandwidth memory, the stacked DRAM beside the GPU die) and through the compute units, then the next layer's follow. A 32-layer model does that 32 times to produce a single token, then starts over for the next. That's the memory wall - inference is limited by bandwidth, not compute, and HBM is the most expensive component on an AI server.

A chip that holds its weights on-die needs no HBM at all. Its memory is SRAM, printed on the logic wafer at a fab that isn't one of the memory plants whose 2027 output is already sold - so pushing inference onto this kind of silicon spreads the manufacturing load onto capacity that isn't already spoken for, and takes some pressure off the RAM and VRAM the rest of us are trying to buy. How much pressure is the open part, since the GPUs these chips get paired with still carry HBM.

Two companies have built exactly that, and they part ways on how much of the model they were willing to freeze to do it. Everything else follows from that.

The same prompt-to-token job on both. On a GPU the weights make the trip, on the specialized chips the data does.

Bet one: the model is the silicon

Taalas puts the weights in a mask-ROM fabric - read-only memory, written once during manufacture - where a single transistor stores four bits and performs the multiply related to it. Data flows through the chip's physical layers in sequence and never goes back out to external memory.

The numbers, all vendor-run and none independently verified:

16,960 tokens/second per user on Llama 3.1 8B, against roughly 230 on an H200. People who hit the public demo reported 14,000-17,000.

0.015 J/token , against Groq's self-reported 1-3 and roughly 10-30 for H100-class systems, per EE Times.

$0.0075 per million tokens , against a typical $0.20-0.50.

815 mm² on TSMC N6, 53 billion transistors, about 250 W per card. One chip holds the whole 8B model.

"Etched in silicon" sounds like the chip is fixed the moment it leaves the fab. That's how most of the coverage reads, and how I read it at first, but it isn't quite true. The die has two regions. The mask-ROM fabric holds the frozen weights. Beside it sits an...