drm/xe: Don't hand out the flat CCS storage as usable VRAM · torvalds/linux@818bebe · GitHub

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drivers/gpu/drm/xe

xe_vram.c

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Collapse file<br>‎drivers/gpu/drm/xe/xe_vram.c‎<br>Copy file name to clipboardExpand all lines: drivers/gpu/drm/xe/xe_vram.c<br>+18-5Lines changed: 18 additions & 5 deletions

Original file line numberDiff line numberDiff line change@@ -89,12 +89,25 @@ static int get_flat_ccs_offset(struct xe_gt *gt, u64 tile_size, u64 *poffset)

8989 offset = offset_hi 32; /* HW view bits 39:32 */<br>9090 offset |= offset_lo 6; /* HW view bits 31:6 */<br>9191 offset *= num_enabled; /* convert to SW view */<br>92- offset = round_up(offset, SZ_128K); /* SW must round up to nearest 128K */<br>9392

94- /* We don't expect any holes */<br>95- xe_assert_msg(xe, offset == (xe_mmio_read64_2x32(&gt_to_tile(gt)->mmio, GSMBASE) -<br>96- ccs_size),<br>97- "Hole between CCS and GSM.\n");<br>93+ /*<br>94+ * Everything below this offset is handed to the VRAM<br>95+ * allocator, so it has to be the *first* address the<br>96+ * compression hardware owns, rounded down. Rounding it up<br>97+ * publishes CCS storage as free memory.<br>98+ */<br>99+ offset = round_down(offset, SZ_4K);<br>100+<br>101+ /*<br>102+ * CCS storage must not run into GSM. The old check compared<br>103+ * the offset against GSMBASE - ccs_size for equality, which<br>104+ * could not fail: that value is 128K aligned, so it agreed<br>105+ * with the rounded-up offset even when the base was not 128K<br>106+ * aligned - exactly the case this fixes.<br>107+ */<br>108+ xe_assert_msg(xe, offset + ccs_size 109+ xe_mmio_read64_2x32(&gt_to_tile(gt)->mmio, GSMBASE),<br>110+ "CCS overlaps GSM.\n");<br>98111 } else {<br>99112 reg = xe_gt_mcr_unicast_read_any(gt, XEHP_FLAT_CCS_BASE_ADDR);<br>100113 offset = (u64)REG_FIELD_GET(XEHP_FLAT_CCS_PTR, reg) * SZ_64K;

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