Xiaomi AI Cube and Xring O100: 1.22 TB/S, 330 Tokens/S and 120B Local AI

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Xiaomi AI Cube and Xring O100: 1.22 TB/s, 330 Tokens/s and 120B Local AI | AiCybr Blog

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Wide canvas<br>Xiaomi AI Cube and Xring O100: 1.22 TB/s, 330 Tokens/s and 120B Local AI<br>By AiCybr Editorial · Published August 24, 2026 · Updated August 24, 2026<br>Xiaomi has shown the AI Cube Prototype , a compact local-AI system built around three Xring processors: O3, O100 and D100 .

The system sustains up to 150 W and runs a 120B + 3B dual-model configuration locally. Its dedicated AI accelerator, Xring O100 (玄戒 O100) , combines 6 nm logic with vertically stacked DRAM and delivers 1.22 TB/s of near-memory bandwidth.

O100 reaches up to 330 tokens/s on Xiaomi MiMo 3B .

Xiaomi AI Cube specifications

Specification<br>Xiaomi AI Cube Prototype

Compute design<br>Three-chip collaborative computing

Chips<br>Xring O3 + Xring O100 + Xring D100

Sustained performance envelope<br>Up to 150 W

Local model configuration<br>120B + 3B

Model operation<br>Fast/slow dual-model switching

O3<br>10-core CPU, 16-core G2-Ultra NX GPU, 200 TOPS NPU

O100<br>6 nm 3D-stacked high-bandwidth AI accelerator

D100<br>3 nm, 20-core CPU, 16-core NPU, up to 160 GB unified memory support

Chassis<br>Aerospace-grade aluminium unibody

Ventilation<br>33,874 CNC-machined perforations

O3 provides the general-purpose CPU/GPU/NPU platform, O100 handles high-bandwidth AI inference, and D100 adds Xiaomi's large-memory high-compute architecture.

Xring O100 specifications

Specification<br>Xring O100

Purpose<br>High-bandwidth AI accelerator for on-device large models

Logic process<br>6 nm

Packaging<br>3D wafer-level vertical stacking

Stacking method<br>Wafer on Wafer

Bonding<br>Hybrid Bonding

Physical interconnect<br>Face-to-Face metal-layer connection

Stack<br>1 × 6 nm logic die + 2 × DRAM dies

Bonding pitch<br>1.4 μm

TSV diameter<br>About 0.7 μm

Effective data lines<br>28,672

NPU<br>14-core high-bandwidth NPU

Internal interconnect<br>Xuanwu high-bandwidth matrix bus

Near-memory bandwidth<br>1.22 TB/s

Bandwidth increase vs Xiaomi flagship-phone reference<br>16×

Demonstrated model<br>Xiaomi MiMo 3B

MiMo 3B inference<br>Up to 330 tokens/s

Prototype cooling<br>10 W-class active-air heat dissipation

Commercial rollout<br>2027

3D-stacked logic and DRAM

O100 places DRAM directly above the AI logic to create a short, wide path between model weights and the NPU.

The stack combines:

one 6 nm logic die ;

two DRAM dies ;

Wafer-on-Wafer vertical assembly;

Hybrid Bonding ;

Face-to-Face metal connections;

28,672 effective data lines .

The bonding pitch is 1.4 μm and the TSV diameter is about 0.7 μm . Xiaomi's packaging comparison increases the data-path count from 96 lines in a conventional PoP-style reference to 28,672 lines in O100.

1.22 TB/s near-memory bandwidth

O100 provides 1.22 TB/s between its stacked memory and AI compute subsystem.

Large-model inference repeatedly reads model weights during token generation, making memory bandwidth a major part of inference throughput.

Platform<br>Published memory bandwidth

RTX 5090<br>1.792 TB/s GDDR7

Xring O100<br>1.22 TB/s near-memory

Apple M3 Ultra<br>819 GB/s unified memory

Radeon AI PRO R9700<br>640 GB/s GDDR6

NVIDIA DGX Spark<br>273 GB/s coherent LPDDR5X

AMD Ryzen AI Halo<br>256 GB/s LPDDR5X

Xring O3<br>113.8 GB/s LPDDR6

O100 reaches its bandwidth through the vertical memory stack and dense interconnect rather than a conventional external memory bus.

330 tokens/s on Xiaomi MiMo 3B

Xring O100 runs Xiaomi MiMo 3B at up to 330 tokens per second .

A 3-billion-parameter model occupies approximately:

Weight precision<br>Raw weight size

16-bit<br>6 GB

8-bit<br>3 GB

4-bit<br>1.5 GB

Xiaomi also demonstrated an O3 + O100 dual-chip prototype , with O3 handling system-level work and O100 handling large-model inference.

Xuanwu high-bandwidth matrix bus

O100 uses Xiaomi's Xuanwu high-bandwidth matrix bus to connect the NPU cores and memory subsystem.

It supports parallel processing across the 14 NPU cores, dynamic routing and high-throughput data movement between compute and the stacked DRAM.

120B + 3B dual-model AI Cube

The AI Cube runs two model sizes locally:

120B-class large model

3B-class small model

Xiaomi describes the system as a fast/slow dual-model design. The smaller model handles fast-response workloads while the 120B model provides the larger parameter budget.

Memory footprint of a 120B model

Weight precision<br>Approx. raw weight size

BF16 / FP16<br>240 GB

8-bit<br>120 GB

6-bit<br>90 GB

5-bit<br>75 GB

4-bit<br>60 GB

3-bit<br>45 GB

A 120B model at 4-bit uses about 60 GB for weights. Inference also uses memory for KV cache, runtime buffers and activations.

AI Cube compared with other local-AI systems

The closest product-class comparisons are compact high-memory systems such as NVIDIA DGX Spark and AMD Ryzen AI Halo . Mac Studio and discrete GPU systems provide useful bandwidth and memory reference points.

Platform<br>Key local-AI specifications

Xiaomi AI Cube<br>O3 + O100 + D100; 120B + 3B local models; O100 at 1.22 TB/s; up to 150 W sustained

NVIDIA DGX Spark<br>GB10 Grace Blackwell; 128...

o100 model xiaomi memory bandwidth xring

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